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| author | Changhuang Liang <changhuang.liang@starfivetech.com> | 2026-08-03 05:40:43 -0700 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-08-04 13:47:00 +0100 |
| commit | 8edce30fc953f5ea06493435a2c26f4709d76e90 (patch) | |
| tree | baf2248dbeb9d7ff58513bedd33c4b21be53e8f7 /tools/perf/scripts/python/stackcollapse.py | |
| parent | defdd0f3d09a0676bdbff230c6783bf066fbddac (diff) | |
spi: dt-bindings: snps,dw-apb-ssi: Add starfive,jhb100-sfc
Add a new compatible string "starfive,jhb100-sfc" for the StarFive
JHB100 SPI Flash Controller, it based on the Synopsys DesignWare
SSI version 2.00a but with minor modifications.
Due to these minor modifications, it only supports access for flash
memory and requires a system controller register to configure the
address mode filter for SPI NOR flash devices.
The starfive,sfc-filter-syscon property is required to provide a phandle
to the system controller that manages switching between 3-byte and
4-byte addressing modes, essential for supporting SPI NOR flash devices
with different address width requirements.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260803124044.156998-11-changhuang.liang@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions