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| author | Tejas Upadhyay <tejas.upadhyay@intel.com> | 2023-11-23 16:09:00 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 11:44:56 -0500 |
| commit | 8bfbe174d7fabf4c6d26e90a133b3129c4e98cbe (patch) | |
| tree | cbe202b480039d37f85dfae43c1ecd3797e5691e /tools/perf/scripts/python/stackcollapse.py | |
| parent | f25d8291aca1ccfb0118ec4c0e98f6301bff15ec (diff) | |
drm/xe/xe2: Add workaround 14019449301
This workaround applies to Xe2_LPM
V3(MattR):
- Reorder reg and wa placement
- Add base parameter to reg macro for better definition
V2(MattR):
- Change name of register
- Loop for all engines
- Driver permanent WA, applies to all steps
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions