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authorSuraj Gupta <suraj.gupta2@amd.com>2026-06-26 14:56:55 +0530
committerVinod Koul <vkoul@kernel.org>2026-07-02 21:10:40 +0530
commit6078690034790131b9a59081bdf30e26de2254af (patch)
tree85fe806e903e355816d1f88197a18d3c22347a51 /tools/perf/scripts/python/stackcollapse.py
parent0b6d055edb55ecadadf54e930c2b4fab76fa9a5a (diff)
dmaengine: xilinx_dma: Enable transfer chaining for AXIDMA and MCDMA by removing idle restriction
Relax the idle check in xilinx_dma_start_transfer() and xilinx_mcdma_start_transfer() that prevented new transfers from being queued when the channel was busy, so scatter-gather transfers can be chained onto an in-flight transfer. In scatter-gather mode, only update the CURDESC register when the active list is empty to avoid interfering with transfers already in progress. When the active list contains transfers, the hardware tail pointer extension mechanism handles chaining automatically via the descriptor next pointer chain, which is set up at channel allocation and preserved across descriptor recycling. Direct (non-SG) mode has no descriptor queue: writing the BTT register launches a transfer immediately, so a new transfer must not be programmed while one is in flight. Keep those transfers serialized by retaining the idle check on the non-SG path. MCDMA always operates in scatter-gather mode, so it is unaffected. Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com> Co-developed-by: Srinivas Neeli <srinivas.neeli@amd.com> Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com> Tested-by: Folker Schwesinger <dev@folker-schwesinger.de> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://patch.msgid.link/20260626092656.1563871-3-suraj.gupta2@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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