diff options
| author | Carlo Caione <ccaione@baylibre.com> | 2026-07-27 09:38:09 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2026-08-03 16:44:31 +0200 |
| commit | 47cadc98c322a839c31463b8ec452b392072968c (patch) | |
| tree | f3207924cf0f7bafb97642b799aa782cbfce03bf /tools/perf/scripts/python/stackcollapse.py | |
| parent | 57d0a99e93a2936b21793109b454e2cc77ecb3a0 (diff) | |
serial: 8250_mtk: honor DT serial aliases
The Genio board DTs provide serial aliases for all enabled UARTs, but
the MTK 8250 driver still registered every port with the default line
number. If uart0 deferred and another UART probed first, the 8250 core
could still assign ttyS0 to the wrong port despite the DT aliases.
Read the serial alias during OF probe and seed uart.port.line before
registering the port so the 8250 core reserves the requested ttyS slot.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://patch.msgid.link/20260727-ccaione-genio-serial-aliases-v2-2-0f2ae41a8e89@baylibre.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions