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authorJakub Kicinski <kuba@kernel.org>2025-11-06 14:16:20 -0800
committerJakub Kicinski <kuba@kernel.org>2025-11-06 14:16:20 -0800
commit380e6f3c7bc53c74697423ff3f057138ad2b6d8f (patch)
tree9c559caf76c50618524df6b3b372284f670bbb07 /tools/perf/scripts/python/stackcollapse.py
parent1ec9871fbb80ba7db84f868f6aa40d38bc43f0e0 (diff)
parent22335939ec907cca26be41f10f6cc01f0df8b0e9 (diff)
Merge branch 'net-dsa-lantiq_gswip-add-support-for-maxlinear-gsw1xx-switch-family'
Daniel Golle says: ==================== net: dsa: lantiq_gswip: Add support for MaxLinear GSW1xx switch family This patch series extends the existing lantiq_gswip DSA driver to support the MaxLinear GSW1xx family of dedicated Ethernet switch ICs. These switches are based on the same IP as the Lantiq/Intel GSWIP found in VR9 and xRX MIPS router SoCs which are currently supported by the lantiq_gswip driver, but they are dedicated ICs connected via MDIO rather than built-in components of a SoC accessible via memory-mapped I/O. The series includes several improvements and refactoring to implement support for GSW1xx switch ICs by reusing the existing lantiq_gswip driver. The GSW1xx family includes several variants: - GSW120: 4 ports, 2 PHYs, RGMII & SGMII/2500Base-X - GSW125: 4 ports, 2 PHYs, RGMII & SGMII/2500Base-X, industrial temperature - GSW140: 6 ports, 4 PHYs, RGMII & SGMII/2500Base-X - GSW141: 6 ports, 4 PHYs, RGMII & SGMII - GSW145: 6 ports, 4 PHYs, RGMII & SGMII/2500Base-X, industrial temperature Key features implemented: - MDIO-based register access using regmap - Support for SGMII/1000Base-X/2500Base-X SerDes interfaces - Configurable RGMII delays via device tree properties - Configurable RMII clock direction - Energy Efficient Ethernet (EEE) support - enabling/disabling learning ==================== Link: https://patch.msgid.link/cover.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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