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authorRenjiang Han <quic_renjiang@quicinc.com>2025-02-18 16:03:20 +0530
committerHans Verkuil <hverkuil@xs4all.nl>2025-04-11 13:29:07 +0200
commit14423fc3a4a21fb436dda85450339ec2bf191b36 (patch)
tree9c816c027a7fb91b74b6ac469cd671a3791fafe3 /tools/perf/scripts/python/stackcollapse.py
parentb588898880b02a8e50bcb72242585021d67f246d (diff)
media: venus: pm_helpers: add compatibility for dev_pm_genpd_set_hwmode on V4
There are two ways to switch GDSC mode. One is to write the POWER_CONTROL register and the other is to use dev_pm_genpd_set_hwmode(). However, they rely on different clock driver flags. dev_pm_genpd_set_hwmode() depends on the HW_CTRL_TRIGGER flag and POWER_CONTROL register depends on the HW_CTRL flag. By default, the dev_pm_genpd_set_hwmode() is used to switch the GDSC mode. If it fails and dev_pm_genpd_set_hwmode() returns -EOPNOTSUPP, it means that the clock driver uses the HW_CTRL flag. At this time, the GDSC mode is switched to write the POWER_CONTROL register. Clock driver is using HW_CTRL_TRIGGER flag with V6. So hwmode_dev is always true on using V6 platform. Conversely, if hwmode_dev is false, this platform must be not using V6. Therefore, replace IS_V6 in poweroff_coreid with hwmode_dev. Also, with HW_CTRL_TRIGGER flag, the vcodec gdsc gets enabled in SW mode by default. Therefore, before disabling the GDSC, GDSC should be switched to SW mode so that GDSC gets enabled in SW mode in the next enable. Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com> [bod: added media prefix] Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
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