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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-05-28 14:47:52 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-07-14 10:36:36 +0200 |
| commit | 1417a63d16ba5681fe137e546aaa9c5b2828c5d5 (patch) | |
| tree | 44596fa609696428a5a5938d8d2fc3844cd1f416 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 1f90a38214d52f773edd02bf02805aa905164ee0 (diff) | |
arm64: dts: renesas: rzt2h-n2h-evk: Configure SCI0 pins
Configure the drive strength, slew rate, and Schmitt trigger settings for
the sci0 pin group shared by the RZ/T2H and RZ/N2H EVK boards.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528134752.79813-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions