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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2026-07-09 10:46:35 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulfh@kernel.org> | 2026-07-13 12:48:44 +0200 |
| commit | 11c4b1688e7104bb052842292c94e5193c553106 (patch) | |
| tree | d44257b96c8b91cf0ccaf6ca07cd371f14f051f9 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 02a2a92c122d018730fcf8ff9ec88f0768d161ec (diff) | |
pmdomain: mediatek: Add support for MT8196 HFRP DirectCTL domains
Add support for the power domains provided by the HFRPSYS Power
Controller of the MT8196 SoC.
Those control power to the eDP and DP Transmitter IPs.
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions