summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/stackcollapse.py
diff options
context:
space:
mode:
authorNuno Sá <nuno.sa@analog.com>2026-07-15 13:24:53 +0200
committerJonathan Cameron <jonathan.cameron@oss.qualcomm.com>2026-07-19 23:16:22 +0100
commit0c76b5213482b597d545255710768e4b7934defc (patch)
tree0b9e2a42e150c5b13c7522e29f14bc7adf99bbfc /tools/perf/scripts/python/stackcollapse.py
parent0777fb25ed35cbb1d0f10625e3b0362a139f8f46 (diff)
iio: buffer-dmaengine: Add support for cyclic DMA transfers
Allow buffer blocks flagged as cyclic to be submitted as repeating DMA transfers. For cyclic blocks, use DMA_PREP_REPEAT so the engine keeps replaying the descriptor. This is useful for output buffers where the same data should be driven continuously without userspace having to requeue it. Examples include continuous RF transmit paths replaying a calibration, test or beacon pattern. Skip installing the completion callback for cyclic blocks. Since the transfer is continuously replayed, the callback would fire on every period, throwing off the block refcount. Because nothing prevents a new cyclic transfer from replacing an already active cyclic one, always set DMA_PREP_LOAD_EOT so the engine correctly terminates the active transfer before loading the new descriptor. Limit the DMA buffer queue to one cyclic DMABUF at a time. There is currently no known use case for queueing multiple cyclic blocks, and cyclic blocks stay referenced until the buffer is disabled. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions