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authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>2026-06-16 13:36:26 +0530
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>2026-06-18 13:29:41 +0530
commit047071a90cc6a50f14dd8f6fb0578e5b2c36a938 (patch)
tree88f596badd6f59f8200caae1b9195317554f62ab /tools/perf/scripts/python/stackcollapse.py
parent09f102ba4a2ef41c7b67822e0e1094425b26f3a1 (diff)
drm/i915/alpm: Move the check for PSR and Fixed RR in compute_config_late
With optimized guardband, we need to take into account LOBF requirements via intel_alpm_lobf_min_guardband(). Currently, we set has_lobf based not only on whether it is supported, but also on whether PSR/fixed RR are ON. Since these features can switch ON and OFF seamlessly, this may cause LOBF to change, resulting in a change in guardband requirements, and eventually to a full modeset. To avoid this, always account for LOBF if it is supported, in the encoder->compute_config() stage. For this, allow has_lobf to be set irrespective of PSR/Fixed RR. Later, in the encoder->compute_config_late() stage, use the PSR/Fixed RR checks to set has_lobf to the final value. Move the PSR/Fixed RR checks from intel_alpm_lobf_compute_config() to intel_alpm_lobf_compute_config_late(), where we already account for other LOBF constraints. v2: Reset has_lobf if psr or VRR is ON in intel_alpm_lobf_compute_config_late(). (Animesh) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patch.msgid.link/20260616080627.2136659-1-ankit.k.nautiyal@intel.com
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