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authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>2026-08-05 13:41:47 +0300
committerMark Brown <broonie@kernel.org>2026-08-07 15:51:40 +0100
commite7643c3f7eb3292f8a98c2ddbf46ba78d848b83d (patch)
treee3df88ed009c7c6215ec9a9a0f1ce858fc1dd241 /tools/perf/scripts/python/parallel-perf.py
parent1cc0cb62d306bb7c42e3d4649863df7c279ac850 (diff)
ASoC: tas2764: sort the register default table
reg_defaults must be sorted by ascending register address, as regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays"). TAS2764_DVC (0x1a) is listed before TAS2764_CHNL_0 (0x03), which makes it unreachable. regcache_reg_needs_sync() then cannot compare it against its default and reports that a sync is needed, so it is written to the device on every regcache_sync() even when it was never touched. Sort the table by register address. Fixes: 827ed8a0fa50 ("ASoC: tas2764: Add the driver for the TAS2764") Cc: stable@vger.kernel.org Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://patch.msgid.link/20260805104149.9795-4-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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