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| author | Damon Ding <damon.ding@rock-chips.com> | 2026-06-05 10:23:03 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2026-07-24 21:30:27 +0200 |
| commit | ede2ee37f0a445cacbf24760f53befa10f64994a (patch) | |
| tree | 9706fcb73d9c1bb8f3cd41905edc7a7632fd5388 /tools/perf/scripts/python/flamegraph.py | |
| parent | dfe078755706ed50651ebbe0442843ecd4ae8389 (diff) | |
arm64: dts: rockchip: Add missing hclk for RK3588 eDP0
Add the required HCLK_VO1 bus clock to RK3588 eDP0 node with
corresponding clock-name "hclk". This clock is necessary for the
eDP controller to access video output GRF and work properly.
Previously the clock was enabled implicitly via GRF phandle
reference. Add it explicitly now to align with updated binding.
Fixes: dc79d3d5e7c7 ("arm64: dts: rockchip: Add eDP0 node for RK3588")
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Link: https://patch.msgid.link/20260605022305.3058853-2-damon.ding@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
0 files changed, 0 insertions, 0 deletions