diff options
| author | Charlene Liu <Charlene.Liu@amd.com> | 2026-06-26 11:39:04 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-07-15 09:15:39 -0400 |
| commit | 72b94048020ce40ea8502ab47cf6c7fb33cbd78f (patch) | |
| tree | 2ca42500ebb28299289e4c08025c385ec52bed5f /tools/perf/scripts/python/flamegraph.py | |
| parent | d5164580a99477dcfe15cea101b153b1e63f1535 (diff) | |
drm/amd/display: limit reuse dsc capable bootup timing
[why]
Previous dcn315 BIOS has known dsc issue, not good for reuse their dsc settings.
this pre-OS dsc issue is fixed in dcn42 bios.
since there is no production bios update for older asic, limit our new code instead.
Reviewed-by: Mohit Bawa <mohit.bawa@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
0 files changed, 0 insertions, 0 deletions