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authorPrathamesh Shete <pshete@nvidia.com>2026-07-27 14:11:21 +0000
committerLinus Walleij <linusw@kernel.org>2026-08-06 23:47:21 +0200
commit27e5b8efc25b9238865288b7091ae6915c2f7c14 (patch)
treeb29be13810ed25acbc121b353a654e0add8c50b5 /tools/perf/scripts/python/flamegraph.py
parent77abd038eaf3a852477daf5c5c4e3cc63fb1399b (diff)
pinctrl: tegra264: fix DAP2 DIN/DOUT pin assignment
The dap2_din and dap2_dout pin groups were given swapped ball suffixes: DAP2_DIN was described as ball PV7 and DAP2_DOUT as ball PW0. On silicon DAP2_DIN is on ball PW0 (mux register 0x6050, drive register 0x6054) and DAP2_DOUT is on ball PV7 (mux register 0x6058, drive register 0x605c), as reflected by the board pinmux. Because the ball suffixes were swapped, the groups were also assigned the wrong primary mux functions (dap2_din -> I2S2_SDATA_OUT and dap2_dout -> I2S2_SDATA_IN), routing the I2S2 data-in and data-out signals to the wrong pins and breaking DAP2 audio. Rename the groups to dap2_din_pw0 and dap2_dout_pv7 and give each pad its correct function (dap2_din_pw0 -> I2S2_SDATA_IN, dap2_dout_pv7 -> I2S2_SDATA_OUT). The register offsets are already correct and are left unchanged. This matches the board pinmux. Fixes: c98506206912 ("pinctrl: tegra: Add Tegra264 pinmux driver") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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