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| author | Peter Ujfalusi <peter.ujfalusi@linux.intel.com> | 2026-08-05 12:02:32 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-08-07 15:45:30 +0100 |
| commit | efd430c4d0426e60fbec400c5a8ce62d886f6e21 (patch) | |
| tree | 8679bd8233f128a05d15a0b805b1e8a164b8c8bd /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | b9339ee3fccc79e751a2f7bde42c5dd57b38b2a9 (diff) | |
ASoC: rt712-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit
fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt712_sdca_reg_defaults[] is grouped by SDCA function instead, so the
binary search does not find 4 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
One of them is the Mic Array Clock Source 0x1C Sample Frequency Index
control, which a part without that function rejects:
soundwire_intel.link.0: Msg ignored for Slave 6, addr: 0x8e00
Sort the table by register address.
Fixes: 936abb09c1c7 ("ASoC: rt712-sdca: add the function for version B")
Cc: stable@vger.kernel.org
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://patch.msgid.link/20260805090240.16991-10-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions
