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| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2026-03-13 17:27:11 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-03-26 09:40:38 -0500 |
| commit | ff8edb5bc8bdf8bdf4573d8dc062b09cc1e6bc76 (patch) | |
| tree | 2c88ffc1ff69ce662f0c120be8bae45adf471417 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | bba8d9ba7df8f6592552377049fc84958fd0575a (diff) | |
arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail
The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.
Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260313-iris-fix-corners-v1-4-32a393c25dda@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions