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authorIcenowy Zheng <zhengxingda@iscas.ac.cn>2026-03-21 17:20:28 +0800
committerThomas Gleixner <tglx@kernel.org>2026-03-26 16:15:03 +0100
commitdc30127cd050dbc9d8452846ee7fa6692a1093d2 (patch)
tree2c56168863b0c5192ca53a056d98320163b9ac11 /tools/perf/scripts/python/export-to-sqlite.py
parent57c9c7bf52c8473a6b9b7fa3547b468c0a91bc60 (diff)
LoongArch: Override arch_dynirq_lower_bound to reserve LPC IRQs
Loongson 7A PCH chips all contain a LPC controller, which is used in some devices to connect legacy ISA devices (e.g. 8259 PS/2 controller). The LPC irqchip driver will register LPC interrupts at the fixed range 0~15, and the PCH PIC irqchip driver uses dynamic allocation. However the LPC interrupt numbers are currently not exempted from dynamic allocation. The current setup work by accident because the LPC interrupt controller is the first consumer of PIC interrupt controller, and the PIC interrupt number is allocated after LPC interrupts are registered. Such setup is fragile and will stop to work when the LPC irqchip driver is reworked. Override arch_dynirq_lower_bound() to reserve LPC interrupts from dynamic allocation, to prevent interrupt number collision and allow rework of the LPC irqchip driver. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://patch.msgid.link/20260321092032.3502701-3-zhengxingda@iscas.ac.cn
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