diff options
| author | Ovidiu Bunea <ovidiu.bunea@amd.com> | 2026-05-14 17:39:25 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-06-03 13:39:58 -0400 |
| commit | c2572d535be4847f8caba58b4ee8446b4ee15b57 (patch) | |
| tree | 8cd25efbd03c67e8ebb636f63b4664c05d85434d /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 95700a3d660287ed657d6892f7be9ffc0e294a93 (diff) | |
drm/amd/display: Fix DP_PIXEL_FORMAT fields & update clk_src for DCN4x
[Why & How]
The enc1_stream_encoder_dp_get_pixel_format() function reads fields of the
DP_PIXEL_FORMAT register that are deprecated on DCN4x. This breaks seamless
boot because driver cannot properly determine the pixel format programmed by VBIOS.
The previous changed submitted for this issue incorrectly calculated the DP DTO
frequency because register access to DCN4x DP DTO registers was not working.
Create a new function that reads the correct fields.
Update clk_src structs to support register access for new DCN4x registers & fields.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions
