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authorCrescent Hsieh <crescentcy.hsieh@moxa.com>2026-07-31 15:48:13 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-08-03 16:51:57 +0200
commitc016f2405cec3809c4be960ab6c3a9c3ee82ef71 (patch)
tree3668cf62b9fd543ea016d47f078f550f5c8ed494 /tools/perf/scripts/python/export-to-sqlite.py
parente8224757c6e7cd2b521b18cbccc70ee4ae1a4977 (diff)
serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window
The MUEx50 UART provides a memory-mapped RX FIFO data window along with an RX FIFO byte counter. When no break or error conditions are present, read received data in bulk via the MMIO FIFO window and push it to the tty layer in one operation. Fall back to the generic 8250 RX path for break and error handling. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-8-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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