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authorTimur Kristóf <timur.kristof@gmail.com>2026-08-03 15:23:04 +0200
committerAlex Deucher <alexander.deucher@amd.com>2026-08-06 12:47:26 -0400
commit5e996008db32112bbf25aba39ea43cd162f4c139 (patch)
treeeb56657f0bab3ec6d79c2107b899e51e86a7d256 /tools/perf/scripts/python/export-to-postgresql.py
parentc9ddc90f91597ba06c9fcbbfd34f62d4b9b524d0 (diff)
drm/amdgpu/gfx6: Clean up rings during reset
Clear the WPTR and RPTR at ring initialization. Additionally clear the ring contents too. This is necessary so that the IP block soft reset can bring the rings back to a clean state. After a reset, the ring contents could contain packets emitted before the reset, and thus need to be cleared to prevent the command processor from executing packets left over in the ring from before the reset. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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