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authorNilesh Javali <njavali@marvell.com>2026-07-23 10:33:59 +0530
committerMartin K. Petersen (Oracle) <mkp@kernel.org>2026-08-06 16:35:46 -0400
commit53fc489ad3356bb9ef346e6c309f84a4419783d0 (patch)
tree038a8bdf2a145ecb8e8ac69de2b808880d6c38d8 /tools/perf/scripts/python/export-to-postgresql.py
parent3cfd2f74b1991f726aaef6b453dd2f37e27a0565 (diff)
scsi: qla2xxx: Fix endianness annotations in vp_rpt_id_entry structures
The vp_rpt_id_entry_24xx and vp_rpt_id_entry_24xx_ext DMA structures use plain uint16_t for fip_flags and bbcr fields that the firmware writes in little-endian format. On big-endian hosts, reading bbcr without le16_to_cpu() produces an incorrect value, breaking the buffer-to-buffer credit enable detection. Additionally, the 29xx ext struct uses __le16 bitfields for vp_idx:9/vp_status:7 which suffer from architecture-dependent bit packing order (same class of bug fixed in the ELS/ABTS extended IOCBs). Fix by: - Changing uint16_t fip_flags/bbcr to __le16 in both qla_fw.h and qla_fw29.h (enables Sparse endianness checking) - Replacing the __le16 bitfields with a scalar __le16 vp_idx_status and defined shift/mask constants - Adding le16_to_cpu() at the bbcr and vp_idx_status access sites in qla_mbx.c Signed-off-by: Nilesh Javali <njavali@marvell.com> Reviewed-by: Hannes Reinecke <hare@kernel.org> Link: https://patch.msgid.link/20260723050413.3897522-43-njavali@marvell.com Signed-off-by: Martin K. Petersen (Oracle) <mkp@kernel.org>
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