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authorChi-Wen Weng <cwweng@nuvoton.com>2026-07-31 10:38:17 +0800
committerMark Brown <broonie@kernel.org>2026-07-31 21:29:21 +0100
commitd458c752cf6cdaa2e83c2758e40fc3ab496d3ab8 (patch)
treea06fae1a133e940bbc313ad8820c94cf71e52b86 /tools/perf/scripts/python/bin
parentf5098b6bae761e346ebcd9da7f95622c04733cff (diff)
dt-bindings: spi: nuvoton,ma35d1-qspi: Add Nuvoton MA35D1 QSPI
Add a devicetree binding for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller supports SPI memory devices such as SPI NOR and SPI NAND flashes. It has one register range, one clock input and one reset line, and supports up to two chip selects. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Chi-Wen Weng <cwweng@nuvoton.com> Link: https://patch.msgid.link/20260731023818.1626075-2-cwweng.linux@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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