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authorManikanta Maddireddy <mmaddireddy@nvidia.com>2026-03-24 13:38:55 +0530
committerManivannan Sadhasivam <mani@kernel.org>2026-04-04 16:15:00 +0530
commit5aec1f18b326ddc455ae9d9d0f5394efc20eee9b (patch)
tree31b6bd9b60efc897062caeb7faa52fa634ceac63 /tools/perf/scripts/python/bin
parent5f352433ea39171e19fbb3a7e18d983510176854 (diff)
PCI: tegra194: Make BAR0 programmable and remove 1MB size limit
The Tegra194/234 Endpoint does not support the Resizable BAR capability, but BAR0 can be programmed to different sizes via the DBI2 BAR registers in dw_pcie_ep_set_bar_programmable(). The BAR0 size is set once during initialization. Remove the fixed 1MB limit from pci_epc_features so Endpoint function drivers can configure the BAR0 size they need. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Niklas Cassel <cassel@kernel.org> Link: https://patch.msgid.link/20260324080857.916263-3-mmaddireddy@nvidia.com
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