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authorWesley Cheng <wesley.cheng@oss.qualcomm.com>2026-03-20 12:56:52 +0200
committerBjorn Andersson <andersson@kernel.org>2026-03-26 09:40:47 -0500
commit4eee57dd4df9f388cb2d7369205e1d51b83c341b (patch)
tree1fdfbd3455dfe3f251969745de2d4aaf27b6ae3a /tools/perf/scripts/python/bin
parent73b24193e71a7bb934c21e660e8f331960e2cfd0 (diff)
arm64: dts: qcom: glymur: Add USB related nodes
The Glymur USB subsystem contains three USB 3.2 Gen 2 controllers, one USB 3.2 multi-port controller, and one USB 2.0-only controller. This includes five SS USB QMP PHYs (three combo and two UNI) and six M31 eUSB2 PHYs. All controllers are based on SNPS DWC3, so describe them as Qualcomm flattened DWC3 nodes. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-dts-qcom-glymur-add-usb-support-v7-1-ba367eda6010@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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