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authorMd Sadre Alam <quic_mdalam@quicinc.com>2025-11-26 12:12:51 +0530
committerUlf Hansson <ulf.hansson@linaro.org>2026-02-23 12:06:52 +0100
commit3d9ce86b52b7b328f5662436904789942a5eca1f (patch)
treed85e7a99da759c04158c9291a061123eb6ecea6f /tools/perf/scripts/python/bin
parent541fe77cc4d77799ac1b869e2183e1bdd716a1f2 (diff)
mmc: sdhci-msm: Enable ICE for CQE-capable controllers with non-CQE cards
Enable Inline Crypto Engine (ICE) support for CQE-capable sdhci-msm controllers when used with eMMC cards that do not support CQE. This addresses the scenario where: - The host controller supports CQE (and has CQHCI crypto infrastructure) - The eMMC card does not support CQE - Standard (non-CMDQ) requests need crypto support This allows hardware-accelerated encryption and decryption for standard requests on CQE-capable hardware by utilizing the existing CQHCI crypto register space even when CQE functionality is not available due to card limitations. The implementation: - Adds ICE register definitions for non-CQE crypto configuration - Implements per-request crypto setup via sdhci_msm_ice_cfg() - Hooks into the request path via mmc_host_ops.request for non-CQE requests - Uses CQHCI register space (NONCQ_CRYPTO_PARM/DUN) for crypto configuration With this, CQE-capable controllers can benefit from inline encryption when paired with non-CQE cards, improving performance for encrypted I/O while maintaining compatibility with existing CQE crypto support. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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