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authorBenoît Monin <benoit.monin@bootlin.com>2026-03-16 16:25:47 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2026-04-13 15:31:41 +0200
commit361600d16e3aba997ec5fa482732565580a948b4 (patch)
tree055e7b771aa510de5e9c9530c142a312ab786e5d /tools/perf/scripts/python/bin
parent4eb9ed3933e541ed96416608033620f64eea39f5 (diff)
MIPS: Add Mobileye EyeQ6Lplus SoC dtsi
Add the device tree include files for the EyeQ6Lplus system on chip from Mobileye. Those files provide the initial support of the SoC: * The I6500 CPU and GIC interrupt controller. * The OLB ("Other Logic Block") providing clocks, resets and pin controls. * One UART. * One GPIO controller. * Two SPI controllers, one in host mode and one in target mode. * One octoSPI flash controller. * Two I2C controllers. Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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