diff options
| author | Mark Brown <broonie@kernel.org> | 2026-07-26 18:35:51 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-07-26 18:35:51 +0100 |
| commit | 2bb3727d7b91674434b19fbb85574f3f5dea16ae (patch) | |
| tree | 9545c950daef32307432d2597520854f49ab8147 /tools/perf/scripts/python/bin | |
| parent | 5d53be1cf9d60a502d7c3898c39643af81d05f9d (diff) | |
| parent | 766f3f79c312c9ecd3c439ef993d55c58b790c09 (diff) | |
ASoC: qcom: qdsp6: Add MI2S clock control
Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> says:
Add support for MI2S clock control within q6apm-lpass DAIs, including
handling of MCLK, BCLK via the DAI .set_sysclk callback. Each MI2S port
now retrieves its clock handles from the device tree, allowing per-port
clock configuration and proper enable/disable during startup and shutdown.
On platforms such as Monaco and Lemans, third-party codecs are
hardware-wired to the SoC and do not always have an in-tree codec
driver to manage their clocks. For these designs, clock line
enablement must be driven from the platform side, and this
series provides the necessary support for that.
On QAIF-based platforms such as Shikra and Hawi, responsibility
for voting I2S MCLK and bit-clock has moved from the DSP to the
kernel. This series introduces the required device tree binding
support to represent and vote for these clocks from the kernel.
Enhances the sc8280xp machine driver to set the boards spacific
configurations.
Link: https://patch.msgid.link/20260724182446.1484894-1-mohammad.rafi.shaik@oss.qualcomm.com
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions
