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authorTomi Valkeinen <tomi.valkeinen@ti.com>2020-03-25 13:14:54 +0100
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-04-14 12:46:15 +0200
commit29decd21bb16c4b482ec5b211a50ae545700f823 (patch)
treea447b43d98100d55a3735684ddb64f968001a254 /tools/perf/scripts/python/bin
parent528649578a87afbf05ab884200e261e7eeaa8a98 (diff)
media: ti-vpe: cal: fix use of wrong macro
i913_errata() sets a bit to 1 in PHY_REG10, but for some reason uses CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE for the bit value. The value of that macro is 1, so it works, but is still wrong. Fix this to 1. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
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