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| author | Thomas Gleixner <tglx@kernel.org> | 2026-02-24 17:36:34 +0100 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-02-27 16:40:08 +0100 |
| commit | 23028286128d817a414eee0c0a2c6cdc57a83e6f (patch) | |
| tree | 727e6c3ba9ded5ba742f7f57bf148dd10c1099b1 /tools/perf/scripts/python/bin | |
| parent | 92d0e753d57ec581a424d9903afff5e17bd1e6e4 (diff) | |
x86/apic: Avoid the PVOPS indirection for the TSC deadline timer
XEN PV does not emulate the TSC deadline timer, so the PVOPS indirection
for writing the deadline MSR can be avoided completely.
Use native_wrmsrq() instead.
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260224163429.877429827@kernel.org
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions