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authorXincheng Zhang <zhangxincheng@ultrarisc.com>2026-06-30 09:26:48 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-07-13 07:10:11 +0200
commit1fc50f1ecde39feb4fccdaf4bc71aa6c0eb25c49 (patch)
treee9fdef5eab30d7c8cb66a8cf3b3e78e00914905f /tools/perf/scripts/python/bin
parentb70dc75e85ba968b7b76eebfe5d63000080b875b (diff)
usb: xhci-pci: Limit VIA VL805 DMA addressing to 36 bits
The VIA VL805/806 xHCI controller advertises AC64, but fails to handle DMA addresses at or above 0x1000000000. On systems with large amounts of RAM, this can cause USB device failures when the controller is given DMA addresses beyond its usable address width. Do not use XHCI_NO_64BIT_SUPPORT for this controller. That quirk clears the cached AC64 capability and limits DMA to 32 bits, causing unnecessary bouncing for addresses between 4GiB and 64GiB and hiding the controller's real AC64 capability from code that may need to distinguish register access width from usable DMA address width. Track the usable DMA address width separately from the AC64 capability. Initialize the generic xhci->dma_mask_bits field to 64 and let PCI quirks reduce it for controllers with narrower DMA support. Set VIA VL805/806 to 36 bits so the DMA API only hands it addresses in the range it can handle while keeping HCCPARAMS1.AC64 visible. Cc: stable <stable@kernel.org> Signed-off-by: Xincheng Zhang <zhangxincheng@ultrarisc.com> Link: https://patch.msgid.link/20260630-xhci-via-dma-fix-v3-1-690dcb8cf75a@ultrarisc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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