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| author | Komal Bajaj <komal.bajaj@oss.qualcomm.com> | 2026-07-28 16:33:08 +0530 |
|---|---|---|
| committer | Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> | 2026-07-31 10:31:21 +0200 |
| commit | 1e7b04c12c077e8829991833a9aa2cb3bdacab61 (patch) | |
| tree | cae17cedeef91ebe1caa2c7e8557a8b831a28449 /tools/perf/scripts/python/bin/task-analyzer-report | |
| parent | fd46760956509f580f7d3d25db4de10e7c6f949b (diff) | |
pinctrl: qcom: shikra: Fix intr_target_width for summary interrupt routing
The intr_target_width field sets the mask width used when writing
target processor into interrupt config register and deciding which
processor receives summary interrupt for a given GPIO.
Without it, pinctrl driver defaults to a 3-bit mask. On Shikra, this
field is 4 bits wide, which could corrupt adjacent bits and mis-route
interrupts. Set intr_target_width = 4 to match the hardware.
Fixes: 9db68ec534c5 ("pinctrl: qcom: Add Shikra pinctrl driver")
Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260728-shikra-pinctrl-intr-width-v1-1-46583734d808@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/task-analyzer-report')
0 files changed, 0 insertions, 0 deletions