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| author | Yi-Wei Wang <yiweiw@nvidia.com> | 2026-07-01 12:20:32 +0900 |
|---|---|---|
| committer | Uwe Kleine-König <ukleinek@kernel.org> | 2026-07-14 11:29:26 +0200 |
| commit | d6bf1d39c3413a44712cba461d47d31e0cec51d7 (patch) | |
| tree | 66288dcab71c64dc08dafe169ce652f3c10778b9 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | dbd80899658a86ac6f1058909ce7b474120b4acf (diff) | |
pwm: tegra: Avoid hard-coded max clock frequency
The clock driving the Tegra PWM IP can be sourced from different parent
clocks. Hence, let dev_pm_opp_set_rate() set the max clock rate based
upon the current parent clock that can be specified via device-tree.
After this, the Tegra194 SoC data becomes redundant, so get rid of it.
Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Co-developed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260701-t264-pwm-v6-3-2718f61f411f@nvidia.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions