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| author | Michal Simek <michal.simek@amd.com> | 2026-06-03 16:19:52 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2026-06-29 10:34:38 +0200 |
| commit | bc7b17594a17dbd752c42e203d3669f08bf0a4f9 (patch) | |
| tree | 27086673bd50997a60dde1530f970578e8601a0e /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | dc59e4fea9d83f03bad6bddf3fa2e52491777482 (diff) | |
arm64: dts: xilinx: drop bias-high-impedance on SDIO CD/WP pins
Since commit 9c105255108b ("pinctrl: pinconf-generic: perform basic
checks on pincfg properties"), the generic pinconf parser logs an error
when a pin configuration node specifies more than one bias mode.
Several ZynqMP boards described SDIO card-detect and write-protect pins
with both bias-high-impedance and bias-pull-up, which triggers at
pinctrl probe:
generic pinconfig core: /firmware/zynqmp-firmware/pinctrl/.../conf-cd:
cannot have multiple bias configurations
On ZynqMP, bias-high-impedance enables tri-state while bias-pull-up
enables the internal pull resistor; these are mutually exclusive bias
settings and only pull-up is needed for CD/WP inputs. Drop the redundant
bias-high-impedance property and keep bias-pull-up.
Reported-by: Mikko Rapeli (Linaro) <mikko.rapeli@linaro.org>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221586
Link: https://patch.msgid.link/e01c8e60e1d9ed68c347f1a3741f89149109d8b7.1780496388.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions
