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authorDibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>2026-06-05 21:23:59 +0530
committerAnimesh Manna <animesh.manna@intel.com>2026-06-17 18:19:23 +0530
commit94c0b93dc2a592560d41ca5be372f679fbcb5774 (patch)
treee163bed04a16a74e41b7aeb8bcb20e299d8f861e /tools/perf/scripts/python/bin/stackcollapse-report
parentfe12dfaef7f7b531c0d2eaad0c1c10af121d347e (diff)
drm/i915/display: Mask RO bits in gen9_write_dc_state()
The DC_STATE_EN register has read-only status bits that are set by hardware on some platforms. These bits may cause the read-back verification loop in gen9_write_dc_state() to spuriously retry. Mask the RO bits from the read-back comparison to prevent unnecessary retries. Changes in v2: - Rename patch from "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits" to "drm/i915/display: Mask RO bits in gen9_write_dc_state()" - Mask only RO bits rather than masking all non DC state bits in DC_STATE_EN. As the register has also some clear-on-write flags, like 'Display DC*CO State Status DSI'(Imre Deak) Changes in v3: - Limit ro mask to read-back comparison. Changes in v4: - Add bit definitions (Jani Nikula) BSpec: 49437,69115 Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patch.msgid.link/20260605155359.4116572-1-dibin.moolakadan.subrahmanian@intel.com
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