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| author | Thomas Zimmermann <tzimmermann@suse.de> | 2026-03-27 14:33:05 +0100 |
|---|---|---|
| committer | Thomas Zimmermann <tzimmermann@suse.de> | 2026-04-08 11:04:49 +0200 |
| commit | 562aa0d24d9ef22f3e39c6e4dd99eeba4617edb2 (patch) | |
| tree | 731971fec03aeec07f6e6126c9ef85f86889a8a9 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 24946c2aa0f1bbafe8089187aa08fb5d417fd069 (diff) | |
drm/ast: Gen6: Fix open-coded register access
Replace all open-coded access to MCR and SCU registers in Gen6 with
the appropriate calls to ast_moutdwm() and ast_mindwm(). Use MCR and
SCU register constants. Name variables according to registers.
v2:
- also fix MCR constants
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patch.msgid.link/20260327133532.79696-14-tzimmermann@suse.de
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions