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| author | Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> | 2026-02-02 16:07:30 +0530 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2026-02-03 13:47:13 +0530 |
| commit | 50f5168775685f78e4492fcc69dc10d288c579d0 (patch) | |
| tree | 49f14334c323ccac952c3abeea81e3a53d75da24 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | a049ced86a40faf1997745d1e748b57f50701bbe (diff) | |
drm/i915/display: Add upper limit check for pixel clock
Add upper limit check for pixel clock for DISPLAY_VER >= 30.
Limits don't apply when DSC is enabled.
The helper returns the upper limit for the platforms, capped to the
max dotclock (khz).
For the currently supported versions of HDMI, pixel clock is already
limited to 600Mhz so nothing needs to be done there as of now.
v2:
- Add this limit to the new helper.
v3:
- Rename helper to intel_max_uncompressed_dotclock(). (Imre)
- Limit only for PTL and cap the limit to max_dotclock. (Imre)
BSpec: 49199, 68912
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260202103731.357416-17-ankit.k.nautiyal@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions