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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-03-19 15:52:34 +0000
committerMarc Zyngier <maz@kernel.org>2026-03-19 18:21:27 +0000
commitf656807150e3e1c6f76cab918e5adfad6d881d58 (patch)
treedc37c39eec4966a64e52c63747141191af37dfe2 /tools/perf/scripts/python/bin/stackcollapse-record
parentda92ff15ca4c5b0f75ec1cb3d2e275db2ff2c810 (diff)
KVM: arm64: gic-v5: Detect implemented PPIs on boot
As part of booting the system and initialising KVM, create and populate a mask of the implemented PPIs. This mask allows future PPI operations (such as save/restore or state, or syncing back into the shadow state) to only consider PPIs that are actually implemented on the host. The set of implemented virtual PPIs matches the set of implemented physical PPIs for a GICv5 host. Therefore, this mask represents all PPIs that could ever by used by a GICv5-based guest on a specific host, albeit pre-filtered by what we support in KVM (see next paragraph). Only architected PPIs are currently supported in KVM with GICv5. Moreover, as KVM only supports a subset of all possible PPIS (Timers, PMU, GICv5 SW_PPI) the PPI mask only includes these PPIs, if present. The timers are always assumed to be present; if we have KVM we have EL2, which means that we have the EL1 & EL2 Timer PPIs. If we have a PMU (v3), then the PMUIRQ is present. The GICv5 SW_PPI is always assumed to be present. Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Link: https://patch.msgid.link/20260319154937.3619520-12-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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