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| author | Ronak Raheja <ronak.raheja@oss.qualcomm.com> | 2026-08-03 14:44:41 +0530 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2026-08-06 21:05:05 +0530 |
| commit | eca0e717aab1cc90eb0b7d8c3e8aa63ca89962a5 (patch) | |
| tree | a90cf2d6290edb58e4a05a5f3d604fca85b74191 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 7abc2c575d5b5d67349caf73509f069e6bf7445a (diff) | |
phy: qualcomm: qmp-combo: Add support for Hawi SoC
Add support for the USB3-DP combo PHY found on Hawi platform.
The QMP PHY for Hawi uses QSERDES V10 register layouts. Add the required
PHY sequences from the hardware programming guide and new V10 register
header files. Also add a new v10 offset structure to incorporate the new
COM AON register module.
Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Link: https://patch.msgid.link/20260803091441.3040830-5-mukesh.ojha@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions