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authorYicong Yang <yang.yicong@picoheart.com>2026-07-28 22:19:38 +0800
committerAnup Patel <anup@brainfault.org>2026-07-29 22:30:06 +0530
commite0ba6bf6579d14148fcc47eebc5daa552b80a5f1 (patch)
tree95b880e3bce5c2efc411ad6f8a8c910d1dc6e731 /tools/perf/scripts/python/bin/stackcollapse-record
parent739dfb8b4b768f553463125253c87ff2c86ac036 (diff)
RISC-V: KVM: Use try_cmpxchg for IMSIC MRIF RMW
Currently the RMW for IMSIC MRIF is implemented with word LRSC loop. This will only cover the lower 32bit on a 64bit system. Instead of guard the implementation with CONFIG_64BIT here, use try_cmpxchg() wrapper which has already take care this to fix this issue. It can also use AMO instructions on supported system. Fixes: db8b7e97d613 ("RISC-V: KVM: Add in-kernel virtualization of AIA IMSIC") Signed-off-by: Yicong Yang <yang.yicong@picoheart.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260728141938.95845-1-yang.yicong@picoheart.com Signed-off-by: Anup Patel <anup@brainfault.org>
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