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| author | Animesh Manna <animesh.manna@intel.com> | 2026-06-16 01:33:27 +0530 |
|---|---|---|
| committer | Animesh Manna <animesh.manna@intel.com> | 2026-06-16 16:10:02 +0530 |
| commit | d68559164b6e91cdadd3c029a2f4db6088923f9d (patch) | |
| tree | bcd0ea9e6b7f021ecffcb9211c7f7435af232aae /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 3269980141ea77813f17e5b7bd55420588e3a837 (diff) | |
drm/i915/vrr: Pass transcoder to intel_vrr_set_fixed_rr_timings()
Take the target transcoder as an explicit parameter so the helper can
program VRR VMIN/VMAX/FLIPLINE registers for transcoders other than the
crtc_state->cpu_transcoder (e.g. the CMTG transcoder).
No functional change: all existing callers pass crtc_state->cpu_transcoder.
v2:
- Add separate patch for renaming the cpu_transcoder variable. [Ville]
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patch.msgid.link/20260615200339.885190-11-animesh.manna@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions