diff options
| author | Mark Brown <broonie@kernel.org> | 2026-08-07 15:57:50 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-08-07 15:57:50 +0100 |
| commit | bce4f1fd272ae60b7d6377802e776b2f6bac2f30 (patch) | |
| tree | de654150212d54a9db2d65d6a66af7af886fa3d3 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 9b57f08ab5c40d6c68653adf8bc80d7e6a3a9d3b (diff) | |
| parent | bbd73fb224caa1badfe2aa338fe9c9dcf40a6e96 (diff) | |
ASoC: codec drivers: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
Affected tables:
ml26124_reg 1 of 79 entries unreachable
cx2072x_reg_defaults 75 of 132 entries unreachable
max9860_reg_defaults 1 of 14 entries unreachable
stih407_sas_reg_defaults 1 of 2 entries unreachable
Link: https://patch.msgid.link/20260805122811.13713-1-peter.ujfalusi@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions
