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| author | Mikko Perttunen <mperttunen@nvidia.com> | 2026-07-01 12:20:34 +0900 |
|---|---|---|
| committer | Uwe Kleine-König <ukleinek@kernel.org> | 2026-07-14 11:29:26 +0200 |
| commit | b9a6f48de9a4816d5f5fc9adacfe7f3433012d2b (patch) | |
| tree | e8911b501923f2cf66542ff8065abd479c6624ab /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 83a4cadc7ae5512262930bbbc2d802e8eef1dc93 (diff) | |
pwm: tegra: Parametrize duty and scale field widths
Tegra264 has wider fields for the duty and scale register fields.
Parameterize the scale field width. The depth value becomes
disconnected from the duty field width, so define it separately
and remove the duty field width definition.
Co-developed-by: Yi-Wei Wang <yiweiw@nvidia.com>
Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com>
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260701-t264-pwm-v6-5-2718f61f411f@nvidia.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions