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authorBjorn Andersson <bjorn.andersson@oss.qualcomm.com>2026-06-11 17:22:37 +0000
committerBjorn Andersson <andersson@kernel.org>2026-06-28 20:02:17 -0500
commita74a98f956ef8e075f28d58507bc5dad7f937fb4 (patch)
treef2fa5ba4475b1a3c60a0d376ff4ee07ff999418f /tools/perf/scripts/python/bin/stackcollapse-record
parent52c7084c8fe57c259e50ff0a7d4f99ccecfc4c7a (diff)
arm64: dts: qcom: glymur: fix QUP serial engine IRQs
The Geni serial-engine interrupts from QUP wrapper 0 all fall in ESPI INTIDs space. While some of the i2c instances has gotten their interrupt specifiers corrected, even the other functions on the same serial-engines are wrong. Ensure that all the serial engine interrupts for QUP wrapper 0 matches the datasheet. Assisted-by: Codex:GPT-5.5 Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi") Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260611-glymur-geni-irqs-v1-1-269428faeb6d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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