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| author | Esteban Urrutia <esteuwu@proton.me> | 2026-07-15 02:37:48 -0400 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2026-08-07 11:53:37 +0530 |
| commit | 9e953732c3ed02b19698bf4af05396a3573681e1 (patch) | |
| tree | cf5cf0420e20532d039d037b7858723c08618800 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | f8b4493d5e7e19682abcf538a9faad012b5ef69e (diff) | |
phy: qcom: qmp-pcie: Add support for SM8475 Gen3x1 PCIe0 port
This gets the port working. Tested with WCN6856 WLAN capabilities.
Serdes, RX and PCS Misc tables had to be added, while TX and PCS tables
were reused from SM8550, and PCS Lane1 was reused from SAR2130P.
Signed-off-by: Esteban Urrutia <esteuwu@proton.me>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20260715-sm8475-bup-pcie-v2-3-48bd91a19abf@proton.me
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions