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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-03-04 11:33:14 +0000 |
|---|---|---|
| committer | Thomas Gleixner <tglx@kernel.org> | 2026-03-10 18:34:51 +0100 |
| commit | 9dc4335758c983045ab38871e2411fa1ae7e438d (patch) | |
| tree | 34d8b1e7be0ae33af74daf9710301acd5d70706e /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | c34368b0404b8fd610b4f589481a1339bab76e0f (diff) | |
irqchip/renesas-rzv2h: Clarify IRQ range definitions and tighten TINT validation
Introduce ICU_IRQ_LAST and ICU_TINT_LAST macros to make range boundaries
explicit and reduce the chance of off-by-one errors.
Extract the TINT information up front in rzv2h_icu_alloc() and validate
the resulting hardware IRQ against the full TINT range
[ICU_TINT_START, ICU_TINT_LAST].
[ tglx: Convert the hard to parse inverse conditions to use a simple helper
macro hwirq_within() which is easy to read, less error prone and
avoids a lot of typing ]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260304113317.129339-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions