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authorSascha Bischoff <Sascha.Bischoff@arm.com>2026-03-19 15:59:19 +0000
committerMarc Zyngier <maz@kernel.org>2026-03-19 18:21:29 +0000
commit9b7aa05533f1bd170211fb6ee5812d9e736492ef (patch)
treee480e68899df951c3cc83a69b4f4d37e70ce9426 /tools/perf/scripts/python/bin/stackcollapse-record
parenta8946fde86f860c3a94dca4ee71fe04a7a519da1 (diff)
KVM: arm64: gic-v5: Probe for GICv5 device
The basic GICv5 PPI support is now complete. Allow probing for a native GICv5 rather than just the legacy support. The implementation doesn't support protected VMs with GICv5 at this time. Therefore, if KVM has protected mode enabled the native GICv5 init is skipped, but legacy VMs are allowed if the hardware supports it. At this stage the GICv5 KVM implementation only supports PPIs, and doesn't interact with the host IRS at all. This means that there is no need to check how many concurrent VMs or vCPUs per VM are supported by the IRS - the PPI support only requires the CPUIF. The support is artificially limited to VGIC_V5_MAX_CPUS, i.e. 512, vCPUs per VM. With this change it becomes possible to run basic GICv5-based VMs, provided that they only use PPIs. Co-authored-by: Timothy Hayes <timothy.hayes@arm.com> Signed-off-by: Timothy Hayes <timothy.hayes@arm.com> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Joey Gouly <joey.gouly@arm.com> Link: https://patch.msgid.link/20260319154937.3619520-38-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
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