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authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>2026-08-05 15:27:28 +0300
committerMark Brown <broonie@kernel.org>2026-08-07 15:53:41 +0100
commit84c5d79aebe6c45e12e3112d14e68972f33c210a (patch)
tree96b291705efdaa522f0c9bfd6dd81d198a32806e /tools/perf/scripts/python/bin/stackcollapse-record
parent437fbdeb60693b8f2e8250d44d29e513a95df298 (diff)
ASoC: fsl_easrc: sort the register default table
reg_defaults must be sorted by ascending register address, as regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays"). The four REG_EASRC_RRL() entries are listed as a block before the four REG_EASRC_RRH() ones, but the two registers of a context alternate in the address map (RRL(n) at 0x110 + 8 * n, RRH(n) at 0x114 + 8 * n). This leaves REG_EASRC_RRL(1), REG_EASRC_RRL(2) and REG_EASRC_RRL(3) unreachable. regcache_reg_needs_sync() then cannot compare them against their default and reports that a sync is needed, so they are written to the device on every regcache_sync() even when they were never touched. Sort the table by register address. Fixes: 955ac624058f ("ASoC: fsl_easrc: Add EASRC ASoC CPU DAI drivers") Cc: stable@vger.kernel.org Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://patch.msgid.link/20260805122728.12362-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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