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| author | Damon Ding <damon.ding@rock-chips.com> | 2026-04-09 14:52:49 +0800 |
|---|---|---|
| committer | Luca Ceresoli <luca.ceresoli@bootlin.com> | 2026-04-09 14:10:33 +0200 |
| commit | 1b7cee81d8147d341c0240fcc9cbd129b95c0043 (patch) | |
| tree | df0d821acb65b4b166b6257a7bf116680414af7a /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | af917a1b95c2b7e58021b4bbe22355323362bbf8 (diff) | |
drm/exynos: exynos_dp: Apply of-display-mode-bridge to parse the display-timings node
If there is neither a panel nor a bridge, the display timing can be
parsed from the display-timings node under the dp node.
In order to get rid of &analogix_dp_plat_data.get_modes() and make
the codes more consistent, apply DRM of-display-mode-bridge to parse
display timings.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de> # rk3588
Link: https://patch.msgid.link/20260409065301.446670-6-damon.ding@rock-chips.com
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions