diff options
| author | Navya Malempati <navya.malempati@oss.qualcomm.com> | 2026-05-22 16:40:13 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-07 21:36:56 -0500 |
| commit | 00dd037fc31452962eba38cdb46feafb0b70d96e (patch) | |
| tree | 3df6050c09dc1f19d01f0d2cdda393cbf579a232 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | dcef71a03f5bb375a5da48b666ad47c6c8855278 (diff) | |
arm64: dts: qcom: monaco: Remove the little/big_cpu_sleep_0 idle states
Firmware supports both CPU power collapse (little/big_cpu_sleep_0) and
CPU PLL/rail power collapse (little/big_cpu_sleep_1) idle states.
However, CPU power collapse modes are often not utilized in favor of
performance, so remove the CPU power collapse modes for monaco,
aligning with SM8350/SM8450/SM8550/SM8650.
Rename little/big_cpu_sleep_1 as little/big_cpu_sleep_0 since it is now
the only CPU idle state in use.
Signed-off-by: Navya Malempati <navya.malempati@oss.qualcomm.com>
Reviewed-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260522-ml_cpuidle-v1-1-fd311cf33fb4@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions