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| author | Akhil P Oommen <akhilpo@oss.qualcomm.com> | 2025-12-31 14:15:22 +0530 |
|---|---|---|
| committer | Rob Clark <robin.clark@oss.qualcomm.com> | 2026-01-15 14:12:32 -0800 |
| commit | e39333a81eeff310fd651e2e6de3680cb7906a32 (patch) | |
| tree | 6447b77f4677eb412e8b87a0110ac1b864db9dfc /tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git | |
| parent | dc220915ddb2d1c646a7d0816b398e73ed5a5d50 (diff) | |
drm/msm/a6xx: Retrieve gmu core range by index
Some GPUs like A612 doesn't use a named register range resource. This
is because the reg-name property is discouraged when there is just a
single resource.
To address this, retrieve the 'gmu' register range by its index. It is
always guaranteed to be at index 0.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/696673/
Message-ID: <20251231-qcs615-spin-2-v6-1-da87debf6883@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Diffstat (limited to 'tools/perf/lib/Documentation/tutorial/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions